U.S. Pat. No. 4,973,381 ("Palmer") discloses a process for etching a semiconductor surface with excited gas which is drawn out by a pressure differential through an output opening in a glass or quartz container toward a surface to be etched. The container is placed in a vacuum enclosure at a pressure of 10.sup.-4 to 10.sup.-5 Torr. The excited species can be a mixture of CCl.sub.4 and O.sub.2 or an active species such as fluorine and a buffer gas such as He, Ar or N.
In Palmer, plasma ions reunite prior to exiling the container and the etching gas will not be in an ionized state when it contacts the wafer.
U.S. Pat. No. 4,978,420 ("Bach") discloses etching vias in a dual-layer comprising SiO.sub.2 and silicon nitride. In Bach, the photoresist and nitride layers are etched simultaneously with an etching gas which includes CF.sub.4 or SF.sub.6, oxygen and argon and the oxide is etched with the same gases except for the absence of oxygen. The power in the plasma reactor is set at 325-350 Watts during the nitride etch and increased to 375 Watts for the oxide etch. A tungsten layer is provided beneath the oxide to resist overetching since W is highly resistant to the oxide etch.
U.S. Pat. No. 4,981,550 ("Huttemann") discloses a process for etching W by exposing a layer of W and a buffer layer to the etching plasma. Huttemann discloses that the buffered layer can be Al and an inert gas such as Ar can be used to sputter clean the buffer layer simultaneously with the plasma etch.
U.S. Pat. No. 4,948,462 ("Rossen") discloses a process for etching W by exposing a W layer to SF.sub.6, N.sub.2 and Cl.sub.2 etching gases.
U.S. Pat. No. 4,617,079 ("Tracy") discloses plasma etching of SiO.sub.2 with 200 sccm Ar, 40 sccm CF.sub.4 and 40 CHF.sub.3.
U.S. Pat. No. 4,407,850 ("Bruce") discloses anisotropic etching of a photoresist under plasma conditions at pressures above those used in reactive ion etching. In particular, etching at rates of 2000 to 300 .ANG./min was obtained using pressures of 0.3 to 2 Torr and reactive gases O.sub.2 and Ar. The background of Bruce mentions that planarizing of rough surface topography allows better focusing using optics with small depths of field. In Bruce, a silicon wafer is coated with a layer of thermal oxide, a 1 .mu.m layer of resist (planarizing layer), a masking layer (1000 .ANG. SiO.sub.2) and a 0.5 .mu.m (5000 .ANG.) layer of photoresist. Bruce discloses that the planarizing layer can be Shipley AZ 1350 photoresist.
In prior art plasma etching and reactive ion etching ("RIE") of silicon oxide a fluorinated gas is used as the etching gas. A problem with this type of etching has been sputtering of metal layers and deposition of an organometallic polymer (a carbon-fluorine based polymer which includes the underlying metal) on sidewalls of vias formed during the etching process. Such deposits of organometallic polymer on the sidewalls of the via and photoresist are difficult to remove.
The above problem is even worse when the semiconductor composite includes multiple layers of metal interconnects since dielectric planarization creates various dielectric thicknesses and the etch time to form the contact openings and vias is based on the thickest oxide step. As a result, the electrical conductor (e.g. metals such as aluminum or silicides such as silicon, polysilicon and titanium silicide) underlying the thinner oxide steps is exposed to the etching gas for a longer time thus producing more sputtering and/or removal of the electrical conductor at that location than the electrical conductor underlying the thicker oxide steps.
In etching silicon oxide, the fluorinated gas reacts with the oxide to form volatile silicon difluoride or silicon tetrafluoride and carbon monoxide or carbon dioxide. In the case where titanium silicide is the underlying electrical conductor, the titanium silicide is not volatile but is eroded by the action of sputtering of the ionized gas. Accordingly, there exists a need in the art for an etch process which can open contacts of various oxide depths while preserving the underlying titanium silicide. By preserving the titanium silicide low contact resistance of the contact metal deposited onto the titanium silicide can be ensured.